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Compiler optimization and ordering effects on VLIW code compression

Conference Paper


Abstract


  • Code size has always been an important issue for all embedded applications as well as larger systems. Code compression techniques have been devised as a way of battling bloated code; however, the impact of VLIW compiler methods and outputs on these compression schemes has not been thoroughly investigated. This paper describes the application of single- and multiple-instruction dictionary methods for code compression to decrease overall code size for the TI TMS320C6xxx DSP family. The compression scheme is applied to benchmarks taken from the Mediabench benchmark suite built with differing compiler optimization parameters. In the single instruction encoding scheme, it was found that compression ratios were not a useful indicator of the best overall code size - the best results (smallest overall code size) were obtained when the compression scheme was applied to size-optimized code. In the multiple instruction encoding scheme, changing parallel instruction order was found to only slightly improve compression in unoptimized code and does not affect the code compression when it is applied to builds already optimized for size. Copyright 2003 ACM.

Publication Date


  • 2003

Citation


  • Ros, M., & Sutton, P. (2003). Compiler optimization and ordering effects on VLIW code compression. In CASES 2003: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (pp. 95-103). doi:10.1145/951710.951725

Scopus Eid


  • 2-s2.0-18844378586

Web Of Science Accession Number


Start Page


  • 95

End Page


  • 103

Volume


Issue


Place Of Publication


Abstract


  • Code size has always been an important issue for all embedded applications as well as larger systems. Code compression techniques have been devised as a way of battling bloated code; however, the impact of VLIW compiler methods and outputs on these compression schemes has not been thoroughly investigated. This paper describes the application of single- and multiple-instruction dictionary methods for code compression to decrease overall code size for the TI TMS320C6xxx DSP family. The compression scheme is applied to benchmarks taken from the Mediabench benchmark suite built with differing compiler optimization parameters. In the single instruction encoding scheme, it was found that compression ratios were not a useful indicator of the best overall code size - the best results (smallest overall code size) were obtained when the compression scheme was applied to size-optimized code. In the multiple instruction encoding scheme, changing parallel instruction order was found to only slightly improve compression in unoptimized code and does not affect the code compression when it is applied to builds already optimized for size. Copyright 2003 ACM.

Publication Date


  • 2003

Citation


  • Ros, M., & Sutton, P. (2003). Compiler optimization and ordering effects on VLIW code compression. In CASES 2003: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (pp. 95-103). doi:10.1145/951710.951725

Scopus Eid


  • 2-s2.0-18844378586

Web Of Science Accession Number


Start Page


  • 95

End Page


  • 103

Volume


Issue


Place Of Publication